1. Field of the Invention.
The invention relates to a method and means for testing integrated circuit chips of the beam lead type before final assembly of the complete semiconductor device. The invention also relates to a method for fabricating an interconnection substrate used in assembling integrated circuit chip devices into a complete package.
2. Description of the Prior Art.
Before the invention there were three methods in general use employed for electrically testing integrated circuit devices.
In the first of these methods employing a probe and positioner, a blade or wire probe is mounted in a X--Y--Z positioner. A number of wafers each containing many integrated circuit chips as yet in unscribed form were mounted radially upon a probe ring. One integrated circuit device was tested at any one time by continually repositioning the probe.
In the second generally used method, involving a fixed point probe card, a wire or blade probe is permanently mounted to a printed circuit card which was specifically designed for the specific integrated circuit chip device being tested. Again, the method was usable in testing only one integrated circuit chip device at any one time.
In the third method involving a probe block, an insulating material is drilled to receive spring-loaded contact pins which coincide with the bonding pads or test points of the integrated circuit chip. This method proved to be generally inapplicable for testing large-scale integrated circuit devices because of the general inability to attain probe spacings of less than 0.004 inch center-to-center.
All of the above-described previously used methods have been capable of testing integrated circuit chip devices using only DC or static tests. That is, the devices could not be tested at the frequency, speed, or data rate at which they were designed to operate when they were later scribed and assembled in a complete integrated circuit device package. Dynamic or AC testing had to wait until the chip was assembled into the final package. If the assembled device failed one or more dynamic tests, the entire device had to be discarded. As packaging costs frequently are greater than the cost of a fabricated integrated circuit chip, this procedure was quite wasteful.